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RT8253A 1 ds8253a-02 march 2011 www.richtek.com ordering information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. pin configurations (top view) applications z industrial and commercial low power systems z set top box z lcd monitors and tvs z green electronics/appliances z point of load regulation of high performance dsps z wireless ap/router sop-8 (exposed pad) 3a, 23v, 340khz synchronous step-down converter general description the RT8253A is a high efficiency, monolithic synchronous step-down dc/dc converter that can deliver up to 3a output current from a 4.5v to 23v input supply. the RT8253A's current mode architecture and external compensation allow the transient response to be optimized over a wide range of loads and output capacitors. cycle by cycle current limit provides protection against shorted outputs and soft-start eliminates input current surge during start up. fault conditions also include output under voltage protection and thermal shutdown. the low current (<3 a) shutdown mode provides output disconnect, enabling easy power management in battery powered systems. the RT8253A is available in a sop-8 (exposed pad) package. features z z z z z 1.5% high accuracy feedback voltage z z z z z 4.5v to 23v input voltage range z z z z z 3a output current z z z z z integrated n-mosfet switches z z z z z current mode control z z z z z fixed frequency operation : 340khz z z z z z output adjustable from 0.8v to 20v z z z z z up to 95% efficiency z z z z z programmable soft-start z z z z z stable with low esr ceramic output capacitors z z z z z cycle by cycle over current protection z z z z z input under voltage lockout z z z z z output under voltage protection z z z z z thermal shutdown protection z z z z z rohs compliant and halogen free boot vin sw gnd ss en fb comp gnd 2 3 4 5 6 7 8 9 marking information RT8253A gspymdnn RT8253Agsp : product number ymdnn : date code package type sp : sop-8 (exposed pad-option 1) RT8253A lead plating system g : green (halogen free and pb free) h : uvp hiccup l : uvp latch-off
RT8253A 2 ds8253a-02 march 2011 www.richtek.com functional pin description pin no. pin name pin function 1 boot bootstrap for high side gate driver. connect 0.1 f or greater ceramic capacitor from boot to sw pins. 2 vin input supply voltage. must bypass with a suitably large ceramic capacitor. 3 sw phase node connect to external l-c filter. 4, 9 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. 5 fb feedback input pin. this pin is connected to the converter output. it is used to set the output of the converter to regulate to the desired value via an internal resistive divider. for an adjustable output, an external resistive divider is connected to this pin. 6 comp compensation node. comp is used to compensate the regulation control loop. connect a series rc network from comp to gnd. in some cases, an additional capacitor from comp to gnd is required. 7 en enable input pin. a logic high enables the converter; a logic low forces the RT8253A into shutdown mode reducing the supply current to less than 3 a. attach this pin to vin with a 100k pull up resistor for automatic startup. 8 ss soft-start control input. ss controls the soft-start period. connect a capacitor from ss to gnd to set the soft-start period. a 0.1 f capacitor sets the soft-start period to 13.5ms. typical application circuit vin en gnd boot fb sw 7 5 2 3 1 l 10h 100nf 22f x 2 r1 31.25k r2 10k v out 3.3v/3a 10f x 2 v in 4.5v to 23v RT8253A ss 8 c ss comp c c 3.3nf r c 15k c p open 6 4, 9 (exposed pad) c boot c in 0.1f c out r en 100k
RT8253A 3 ds8253a-02 march 2011 www.richtek.com function block diagram v a + - + - + - uv comparator oscillator 340khz / 110khz foldback control 0.4v internal regulator + - 2.7v shutdown comparator current sense amplifier boot vin gnd sw fb en comp 3v 5k v a v cc 6a slope comp current comparator + - ea 0.8v s r q q ss + - 1.2v lockout comparator v cc + 85m 85m
RT8253A 4 ds8253a-02 march 2011 www.richtek.com electrical characteristics (v in = 12v, t a = 25 c, unless otherwise specified) absolute maximum ratings (note 1) z v in ------------------------------------------------------------------------------------------------------------------ ? 0.3v to 25v z sw ----------------------------------------------------------------------------------------------------------------- ? 0.3v to (v in + 0.3v) z boot ------------------------------------------------------------------------------------------------------------- ( sw ? 0.3v) to (sw + 6v) z all other v oltages ---------------------------------------------------------------------------------------------- ? 0.3v to 6v z boot ? sw ----------------------------------------------------------------------------------------------------- ? 0.3v to 6v z power dissipation, p d @ t a = 25 c sop-8 (exposed pad) ---------------------------------------------------------------------------------------- 1.333w z package thermal resistance (note 2) sop-8 (exposed pad), ja ----------------------------------------------------------------------------------- 75 c/w sop-8 (exposed pad), jc ---------------------------------------------------------------------------------- 15 c/w z lead temperature (soldering, 10 sec.) -------------------------------------------------------------------- 260 c z junction temperature ------------------------------------------------------------------------------------------ 150 c z storage temperature range --------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body mode) ----------------------------------------------------------------------------------- 2kv mm (ma chine mode) ------------------------------------------------------------------------------------------- 200v recommended operating conditions (note 4) z supply voltage, v in -------------------------------------------------------------------------------------------- 4.5v to 23v z junction temperature range --------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range --------------------------------------------------------------------------------- ? 40 c to 85 c parameter symbol test conditions min typ max unit shutdown supply current v en = 0v -- 0.5 3 a supply current v en = 3 v, v fb = 0.9v -- 0.8 1.2 ma feedback reference voltage v fb 4.5v v in 23v 0.788 0.8 0.812 v error amplifier transconductance g ea i c = 10 a -- 940 -- a/v high side switch on resistance r ds(on)1 -- 85 -- m low side switch on resistance r ds(on)2 -- 85 -- m high side switch leakage current v en = 0v, v sw = 0v -- 0 10 a upper switch current limit min. duty cycle, v boot ? v sw = 4.8v -- 5.8 -- a comp to current sense transconductance g cs -- 5.6 -- a/v oscillation frequency f osc1 300 340 380 khz short circuit oscillation frequency f osc2 v fb = 0v -- 110 -- khz maximum duty cycle d max v fb = 0.7v -- 93 -- % minimum on time t on -- 100 -- ns to be continued
RT8253A 5 ds8253a-02 march 2011 www.richtek.com parameter symbol test conditions min typ max unit input under voltage lockout threshold v in rising 3.8 4.2 4.5 v input under voltage lockout threshold hysteresis -- 320 -- mv logic-high v ih 2.7 -- 5.5 en threshold voltage logic-low v il -- -- 0.4 v soft-start current i ss v ss = 0v -- 6 -- a soft-start period t ss c ss = 0.1 f -- 13.5 -- ms thermal shutdown t sd -- 150 -- c note 1. stresses listed as the above "absolute maximum ratings" may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. ja is measured in natural convection at t a = 25 c on a high effective thermal conductivity four-layer test board of jedec 51-7 thermal measurement standard. the measurement case positions of jc are on the lead of the sop package and the expose pad for the sop(exposed pad) package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions.
RT8253A 6 ds8253a-02 march 2011 www.richtek.com typical operating characteristics efficiency vs. load current 0 8 16 24 32 40 48 56 64 72 80 88 96 104 0.001 0.010 0.100 1.000 10.000 load current (a) efficiency (%) v in = 4.5v v in = 12v v in = 23v v out = 3.3v, v en = v in reference voltage vs. input voltage 0.780 0.785 0.790 0.795 0.800 0.805 0.810 0.815 0.820 4 7 10 13 16 19 22 25 input voltage (v) reference voltage (v) v in = 4.5v to 23v, v out = 3.3v, v en = v in , i out = 0.5a reference voltage vs. temperature 0.785 0.790 0.795 0.800 0.805 0.810 0.815 0.820 -50 -25 0 25 50 75 100 125 temperature (c) reference voltage (v) v in = 12v, v out = 3.3v, v en = v in , i out = 0.5a switching ferquency vs. input voltage 300 305 310 315 320 325 330 335 340 345 350 355 360 365 370 375 380 4 7 10 13 16 19 22 25 input voltage (v) switching frequency (khz) 1 v in = 4.5v to 23v, v out = 3.3v, v en = v in , i out = 0.5a switching frequency vs. temperature 300 310 320 330 340 350 360 370 380 -50 -25 0 25 50 75 100 125 temperature ( c) switching frequency (khz) 1 v in = 12v, v out = 3.3v, v en = v in , i out = 0.5a output voltage vs. load current 3.200 3.225 3.250 3.275 3.300 3.325 3.350 3.375 3.400 0.001 0.01 0.1 1 10 load current (a) output voltage (v) v in = 12v, v out = 3.3v, v en = v in v in = 4.5v v in = 12v v in = 23v
RT8253A 7 ds8253a-02 march 2011 www.richtek.com current limit vs. duty cycle 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 0 153045607590105 duty cycle (%) current limit (a) 1 v in = 4.5v to 23v, v out = 3.3v, v en = v in current limit vs. temperature 4.00 4.25 4.50 4.75 5.00 5.25 5.50 5.75 6.00 6.25 6.50 6.75 7.00 7.25 7.50 7.75 8.00 -50 -25 0 25 50 75 100 125 temperature ( c) current limit (a) v in = 12v, v out = 3.3v, v en = v in load transient response time (100 s/div) v in = 12v, v out = 3.3v, v en = v in , i out = 1.5a to 3a v out (200mv/div) i load (2a/div) load transient response time (100 s/div) v in = 12v, v out = 3.3v, v en = v in , i out = 0a to 3a v out (200mv/div) i load (2a/div) switching waveform time (1 s/div) v in = 12v, v out = 3.3v, v en = v in , i out = 3a v out (10mv/div) i l (2a/div) v sw (10v/div) switching waveform time (1 s/div) v in = 12v, v out = 3.3v, v en = v in , i out = 1.5a v out (10mv/div) i l (2a/div) v sw (10v/div)
RT8253A 8 ds8253a-02 march 2011 www.richtek.com power on from v in time (4ms/div) v in = 12v, v out = 3.3v, v en = v in , i out = 3a v in (5v/div) i l (2a/div) v out (2v/div) power off from v in time (4ms/div) v in = 12v, v out = 3.3v, v en = v in , i out = 3a v in (10v/div) i l (5a/div) v out (5v/div) power on from en time (4ms/div) v in = 12v, v out = 3.3v, v en = v in , i out = 3a v en (5v/div) i l (2a/div) v out (2v/div) power off from en time (4ms/div) v in = 12v, v out = 3.3v, v en = v in , i out = 3a v en (5v/div) i l (2a/div) v out (2v/div)
RT8253A 9 ds8253a-02 march 2011 www.richtek.com application information the RT8253A is a single phase buck pwm converter with internal n-mosfet switches. it provides single feedback loop, current mode control with fast transient response. an internal 0.8v reference allows the output voltage to be precisely regulated for low output voltage applications. a fixed switching frequency (340khz) oscillator is integrated to eliminate external component count. the RT8253A also supports programmable soft start function by an external capacitor. protection features include over current protection, under voltage protection and input under voltage lockout (uvlo). pwm operation the RT8253A utilizes dem control to improve light load efficiency. depending on the load current, the controller automatically operates in diode emulation mode (dem) or in continuous conduction mode (ccm) with fixed frequency pwm. at light load condition, the RT8253A automatically operates in diode emulation mode to reduce switching frequency to improve efficiency. as the output current decreases from heavy load condition, the inductor current decreases, and eventually the inductor valley current decreases to zero, which is the boundary between continuous conduction mode and discontinuous conduction mode. by emulating the behavior of diodes, the low side mosfet allows only partial negative current to flow when the inductor freewheeling current becomes negative. as the load current further decreases, it takes longer and longer to discharge the output capacitor to the level that allows the next ugate on-time to begin. when the output current increases from light load to heavy load, the switching frequency increases to the ccm value as the inductor current reaches the continuous conduction condition. the controller will then operate in continuous conduction mode with 340khz fixed pwm switching frequency. output voltage setting connect a resistive voltage divider at the fb pin between v out and gnd to adjust the respective output voltage between 0.8v and 20v (figure 1). choose r2 to be approximately 10k , and solve for r1 using the equation : out fb r1 vv x 1 r2 ?? ?? =+ ?? ?? ?? ?? where v fb is 0.8v (typ.). RT8253A gnd fb r1 r2 v out figure 1. setting v out with a resistive voltage divider external bootstrap diode & capacitor the bootstrap capacitor must be 0.1 f and located between the boot pin and sw pin. this capacitor provides the gate driver voltage for the high side mosfet and should be a high quality ceramic type with x7r or x5r grade dielectric for temperature stability. an external bootstrap diode may enhance the efficiency of the regulator and it is recommended to add one between an external 5v source and the boot pin (figure 2). the applicable conditions of the external bootstrap diode are as follows : out in v d>65% v = z input voltage is lower than 5.5v; and z duty cycle is high: in these cases, the external 5v source can be a fixed 5v from the system or the output of the RT8253A. note that the external boot voltage must be lower than 5.5v. figure 2. external bootstrap diode & capacitor chip enable and disable the en pin is the RT8253A enable input. drive en below the precise input falling edge trip level to place the RT8253A in its low power shutdown state. the RT8253A quiescent current drops to lower than 3 a while in shutdown. when sw boot 5v RT8253A 0.1f
RT8253A 10 ds8253a-02 march 2011 www.richtek.com shutdown mode is activated, the RT8253A will stop switching. the accurate 0.4v falling edge threshold on the en pin can be used to detect a specific analog voltage level and to shutdown the device. once in shutdown, the 2.7v rising edge threshold must be triggered to reactivate the power up sequence. for external timing control (e.g. rc), the en pin can also be externally pulled high by adding a r en * resistor and c en * capacitor from the vin pin. for general applications, the en pin is externally pulled high by adding a 100k from the vin pin (see figure 3). uvlo protection the RT8253A has an input under voltage lockout protection (uvlo). if the input voltage exceeds the uvlo rising threshold voltage (4.2v typ.), the converter will reset and prepare the pwm for operation. if the input voltage falls below the uvlo falling threshold voltage during normal operation, the device will stop switching. the uvlo rising and falling threshold voltage has a hysteresis to prevent noise caused reset. external soft-start (ss) it is highly recommended to program the soft start time externally because it is not included internally. the RT8253A effectively uses the lower voltage of the internal voltage reference or the ss pin voltage as the power supply's reference voltage which is fed into the error amplifier and regulate accordingly. a capacitor (c ss ) between the ss pin and ground implements a soft start time. the RT8253A has an internal pull up current source of 6 a that charges the external soft start capacitor. the equation for the soft start time is shown below : ss ref ss ss c x v t i = where v ref is 0.8v and i ss current is 6 a. generally, a 0.1 f capacitor is used and the soft start time will be 13.5ms (typ.) under voltage protection hiccup mode for the RT8253Ah, hiccup mode under voltage protection (uvp) function is provided. when the fb voltage drops below half of the feedback voltage, v fb , the uvp function will be triggered and the RT8253Ah will shut down for a period of time and then recover automatically. the hiccup mode uvp can reduce input current in short circuit conditions. latch off mode for the RT8253Al, latch off mode under voltage protection (uvp) function is provided. when the fb voltage drops below half of the feedback voltage, v fb , the uvp function will be triggered and the RT8253Al will shut down in latch off mode. in shutdown condition, the RT8253Al can only be reset through en or power input v in . input inrush current to calculate the input inrush current, the following equation can be used : out out inrush ss c x v i t = where i inrush is the input current during start up, c out is the total output capacitance, v out is the desired output voltage, and t ss is the soft start time. if the inrush current is higher than the current limit level, current limit will be triggered. inductor selection the switching frequency (on-time) and operating point (% ripple or lir) determine the inductor value as shown below : out in out sw load(max) in vx(vv) l fx lir x i x v ? = where lir is the ratio of the peak to peak ripple current to the average inductor current. find a low loss inductor having the lowest possible dc resistance that fits in the allotted dimensions. ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200khz. the core must be large enough not to saturate at the peak inductor current (i peak ) : () peak load(max) load(max) ii lir/2xi ?? =+ ?? the calculation above shall serve as a general reference. to further improve transient response, the output inductor can be reduced further. this needs to be considered along with the selection of the output capacitor.
RT8253A 11 ds8253a-02 march 2011 www.richtek.com input capacitor selection voltage rating and current rating are the key parameters in selecting the input capacitor. generally, the input capacitor should have a voltage rating 1.5 times greater than the maximum input voltage to be considered a conservatively safe design. the input capacitor is used to supply the input rms current, which can be approximately calculated using the following equation : out out in_rms load in in vv i i x x 1 vv ?? =? ?? ?? the next step is to select a proper capacitor for rms current rating. for a good design use more than one capacitor with low equivalent series resistance (esr) in parallel to form a capacitor bank. output capacitor selection the output capacitor and inductor form a low pass filter in the buck topology. in steady state condition, the ripple current flowing into/out of the capacitor results in ripple voltage. the output voltage ripple (v p-p ) can be calculated by the following equation. p p load(max) out sw 1 v lir x i x esr 8 x c x f ? ?? =+ ?? ?? when load transient occurs, the output capacitor supplies the load current before the controller can respond. therefore, the esr will dominate the output voltage sag during load transient. the output voltage undershoot (v sag ) can be calculated by the following equation : sag load vi x esr = for a given output voltage sag specification, the esr value can be determined. another parameter that has influence on the output voltage sag is the equivalent series inductance (esl). the rapid change in load current results in di/dt during transient. therefore esl contributes to part of the voltage sag. use a capacitor that has low esl to obtain better transient performance. generally, using several capacitors connected in parallel will have better transient performance than using one single capacitor for the same total esr. unlike the electrolytic capacitor, the ceramic capacitor has relatively low esr and can reduce the voltage deviation during load transient. however, the ceramic capacitor can only provide low capacitance value. therefore, using a mixed combination of electrolytic capacitor and ceramic capacitor can also have better transient performance. emi consideration since parasitic inductance and capacitance effects in pcb circuitry would cause a spike voltage on the sw pin when high side mosfet is turned on/off, this spike voltage on sw may impact emi performance in the system. in order to enhance emi performance, there are two methods to suppress the spike voltage. one method is to place an r- c snubber between sw and gnd and locate them as close as possible to the sw pin (see figure 3). another way is adding a resistor in series with the bootstrap capacitor, c boot , but this will decrease the driving capability to the high side mosfet. it is strongly recommended to reserve the r-c snubber during pcb layout for emi improvement. moreover, reducing the sw trace area and keeping the main power in a small loop will be helpful for emi performance. for detailed pcb layout guideline, please refer to the section on layout consideration. figure 3. reference circuit with snubber and enable timing control vin en gnd boot fb sw 7 5 2 3 1 l 10h 0.1f 22f x 2 r1 31.25k r2 v out 3.3v/3a 10f x 2 chip enable v in 4.5v to 23v RT8253A ss 8 c ss comp r c 15k c c 3.3nf c p nc 6 4, 9 (exposed pad) r boot * c in 0.1f c out r en * c en * c boot rs* cs* 10k
RT8253A 12 ds8253a-02 march 2011 www.richtek.com thermal shutdown the device implements an internal thermal shutdown function to protect itself when the junction temperature exceeds 150 c. the thermal shutdown forces the device to stop switching when the junction temperature exceeds the thermal shutdown threshold. once the die temperature decreases below 150 c, the device reinstates the power up sequence. loop compensation the RT8253A is a current mode converter and requires external compensation to have an accurate output voltage regulation with fast transient response. the main concern of compensation deals with the position of the capacitor esr zero and mid frequency to high frequency gain boost. the RT8253A uses a high gain operational transconductance amplifier (ota) as the error amplifier. as figure 4 shows, the ota works as the voltage controlled current source. the characteristic of ota is shown as below : ()() out m m comp out out i gm ,where v v v v and v i x z ==+?? = + - i out gm z out v comp v+ v- figure 4. operational transconductance amplifier, ota figure 5 shows a typical buck control loop using type-ii compensator. the control loop consists of the power stage, current comparator and a compensation network. the current comparator compares v comp with the sum of current sense and slope comp to provide pulse width modulated (pwm) gate driving signal with the oscillator. the pwm wave is smoothed out by the output filter, l and c out . the output voltage (v out ) is sensed and fed to the inverting input of the error amplifier. figure 5. typical current mode buck converter with type-ii compensator the modulator transfer function is the small signal transfer function of v out /v comp (output voltage over the error amplifier output). according to the derivation of the ridley?s thesis, the transfer function is dominated by a dc gain, a double pole, a low frequency pole, and an esr zero as shown in figure 6. [] out load cs comp load s c ph v r x g v 1 x r x t 1x m x (1d)0.5 l x f (s) x f (s) ? +?? where r load is the load resistor; g cs is the current sense transconductance; m c is the slope comp value; d is the duty cycle; t s is the switching period. and : out p p 1sc x esr f(s) s 1 + = + where [] s p out load out c t 1 c x r l x c x m x (1 d) 0.5 =+ ?? and h 2 2 np n 1 f(s) ss 1 q = ++ pwm control + - v ref oscillator + - gm + current sense slope comp current comparator v in l r1 c out esr v out fb c c comp r c c p v comp r2
RT8253A 13 ds8253a-02 march 2011 www.richtek.com where [] p c n s 1 q x m x (1 d) 0.5 t = ?? = the goal of the compensation network is to provide adequate phase margin (usually greater than 45 degrees) and the highest bandwidth (0db crossing frequency). it is also recommended to manipulate loop frequency response that its gain crosses over 0db at a slope of -20db/dec. according to figure 5, the compensation network frequency is shown as below : p1 p2 pc c pc cc f0 1 f cxc 2 x rx cc 1 fz 2 x c x r = = ?? ?? + ?? = determining the 0db crossing frequency (f c , control loop bandwidth) is the first step of compensator design. usually, f c is set to 0.1 to 0.5 times switching frequency. the second step is to calculate the open loop modulator gain and find out the gain loss at f c . the third step is to design a compensator gain that can compensate the modulator gain loss at f c . the final step is to design f z and f p2 to make loop have sufficient phase margin. f z is designed to cancel the low frequency pole of modulator. f p2 is usually placed below switching frequency (typically, 0.5 to 1 times switching frequency) to eliminate high frequency noise. figure 6. typical bode plot of a current mode buck converter thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction to ambient thermal resistance. for recommended operating condition specifications of the RT8253A, the maximum junction temperature is 125 c and t a is the ambient temperature. the junction to ambient thermal resistance, ja , is layout dependent. for sop-8 (exposed pad) packages, the thermal resistance, ja , is 75 c/w on a standard jedec 51-7 single layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formula : p d(max) = (125 c ? 25 c) / (75 c/w) = 1.333w for sop-8 (exposed pad) package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . for the RT8253A package, the derating curve in figure 7 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. compensation gain modulation gain 0 loop gain f c double pole generated by f h (s) zero generated by esr and cout of f p (s) pole generated by f p (s) pole generated by compensation network, f p2 zero generated by compensation network, f z frequency (hz) gain (db) figure 7. derating curve for RT8253A package 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) 1 four-layer pcb
RT8253A 14 ds8253a-02 march 2011 www.richtek.com layout considerations layout is very important in high frequency switching converter design. pcb could radiate excessive noise and contribute to the converter instability with improper layout. certain points must be considered before starting a layout using the RT8253A (figure 8). ` keep the traces of the main current paths as short and wide as possible. ` put the input capacitor as close as possible to the device pins (vin and gnd). figure 8. pcb layout guide sw ss boot vin gnd sw fb en comp gnd 2 3 4 5 6 7 8 9 r2 the feedback components must be connected as close to the device as possible. gnd r1 r c c c c p gnd c s v in v in gnd c in c in c out c out c s * r s * v out sw should be connected to inductor by wide and short trace. keep sensitive components away from this trace. input capacitor must be placed as close to the ic as possible. v out r en l ` sw node is with high frequency voltage swing and should be kept at small area. keep sensitive components away from sw node to prevent stray capacitive noise pick up. ` ensure all feedback network connections are short and direct. place the feedback network and compensation components are close to the chip as possible. ` the gnd pin and exposed pad should be connected to a strong ground plane for heat sinking and noise protection. ` an example of pcb layout guide is shown in figure 8 for reference.
RT8253A 15 ds8253a-02 march 2011 www.richtek.com information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the ri ght to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property inf ringement of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications i s assumed by richtek. richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 richtek technology corporation taipei office (marketing) 5f, no. 95, minchiuan road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)86672399 fax: (8862)86672377 email: marketing@richtek.com outline dimension a b j f h m c d i y x exposed thermal pad (bottom of package) 8-lead sop (exposed pad) plastic package dimensions in millimeters dimensions in inches symbol min max min max a 4.801 5.004 0.189 0.197 b 3.810 4.000 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.510 0.013 0.020 f 1.194 1.346 0.047 0.053 h 0.170 0.254 0.007 0.010 i 0.000 0.152 0.000 0.006 j 5.791 6.200 0.228 0.244 m 0.406 1.270 0.016 0.050 x 2.000 2.300 0.079 0.091 option 1 y 2.000 2.300 0.079 0.091 x 2.100 2.500 0.083 0.098 option 2 y 3.000 3.500 0.118 0.138

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